IBM and the University of Texas at Austin plan to collaborate on building a processor capable of churning out more than 1 trillion calculations per second--faster than many of today's top supercomputers.
The TRIPS (Tera-op Reliable Intelligently adaptive Processing System) architecture for the chip was conceived of by researchers at the university. But it will be brought to reality through a collaborative effort with IBM's Austin Research Lab, according to IBM. The Defense Advanced Research Projects Agency (DARPA) is funding the effort with an $11.1 million grant.
At the heart of the TRIPS architecture is a new concept called "block-oriented execution," IBM said. Whereas most chips can handle just a few calculations at a time, a processor based on TRIPS architecture will be able to perform large blocks of them simultaneously, the company said.