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Latest News

HPC Users Group and BWBUG meeting May 8th at Georgetown University
Posted by Kenneth Farmer, Tuesday May 08 2007 @ 11:49AM EDT

Guest speaker: Terry Hulett, NetEffect, Vice President of Architecture and Silicon Engineering

Terry leads NetEffect's innovation efforts, leveraging more than 23 years of semiconductor design experience. Prior to joining Banderacom and NetEffect, he held key positions at Advanced Micro Devices (AMD) and Motorola Semiconductor, leading several microprocessor development teams. At AMD, Terry led the development of over 15 chips and built AMD's first high-volume card-based products. He joined Banderacom in 1999 where he successfully led the Company's InfiniBand chip development program delivering the first product in 9 months. Terry also previously served as vice president of research and development for Austin-based Si Solutions, Inc. Terry received his BSEE at Oklahoma State University.

NetEffect is addressing the needs of this market with a family of 10 Gbps iWARP Ethernet Channel Adapters that meet the low latency and high data throughput requirements of high performance cluster computing.

NetEffect's full iWARP Ethernet implementation supports all the node-to-node interconnect performance enhancement and overhead reduction requirements including RDMA, TCP Offload, and OS Bypass

More info: http://bwbug.wordpress.com/


< Opening at Penn State: Systems Administrator, HPC Systems Engineer | Server Snapshots: HP Integrity rx2660 >

 

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Supercomputing 2010

- Supercomputing 2010 website...

- 2010 Beowulf Bash

- SC10 hits YouTube!

- Louisiana Governor Jindal Proclaims the week of November 14th "Supercomputing Week" in honor of SC10!








Appro: High Performance Computing Resources
IDC: Appro Xtreme-X Supercomputer Blade Solution
Analysis of the Xtreme-X architecture and management system while assessing challenges and opportunities in the technical computing market for blade servers.

Video - The Road to PetaFlop Computing
Explore the Scalable Unit concept where multiple clusters of various sizes can be rapidly built and deployed into production. This new architectural approach yields many subtle benefits to dramatically lower total cost of ownership.
White Paper - Optimized HPC Performance
Multi-core processors provide a unique set of challenges and opportunities for the HPC market. Discover MPI strategies for the Next-Generation Quad-Core Processors.

Appro and the Three National Laboratories
[Appro delivers a new breed of highly scalable, dynamic, reliable and effective Linux clusters to create the next generation of supercomputers for the National Laboratories.

AMD Opteron-based products | Intel Xeon-based products



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